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Rev. 5.00, 09/03, page 44 of 760
Table 2.8 lists the SH7709S logic operation instructions.
Table 2.8 Logic Operation Instructions
Instruction Operation Code
Privileged
Mode Cycles T Bit
AND Rm,Rn Rn & Rm → Rn 0010nnnnmmmm1001 —1—
AND #imm,R0 R0 & imm → R0 11001001iiiiiiii —1—
AND.B #imm,@(R0,GBR) (R0 + GBR) & imm →
(R0 + GBR)
11001101iiiiiiii —3—
NOT Rm,Rn ~Rm → Rn 0110nnnnmmmm0111 —1—
OR Rm,Rn Rn | Rm → Rn 0010nnnnmmmm1011 —1—
OR #imm,R0 R0 | imm → R0 11001011iiiiiiii —1—
OR.B #imm,@(R0,GBR) (R0 + GBR) | imm →
(R0 + GBR)
11001111iiiiiiii —3—
TAS.B @Rn If (Rn) is 0, 1 → T;
1 → MSB of (Rn)
0100nnnn00011011 —3Test
result
TST Rm,Rn Rn & Rm; if the result
is 0, 1 → T
0010nnnnmmmm1000 —1Test
result
TST #imm,R0 R0 & imm; if the result
is 0, 1 → T
11001000iiiiiiii —1Test
result
TST.B #imm,@(R0,GBR) (R0 + GBR) & imm;
if the result is 0, 1 → T
11001100iiiiiiii —3Test
result
XOR Rm,Rn Rn ^ Rm → Rn 0010nnnnmmmm1010 —1—
XOR #imm,R0 R0 ^ imm → R0 11001010iiiiiiii —1—
XOR.B #imm,@(R0,GBR) (R0 + GBR) ^ imm →
(R0 + GBR)
11001110iiiiiiii —3—