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Rev. 5.00, 09/03, page 610 of 760
19.13.2 SC Port Data Register (SCPDR)
Bit:76543210
SCP7DT SCP6DT SCP5DT SCP4DT SCP3DT SCP2DT SCP1DT SCP0DT
Initial value: * 0000000
R/W: R R/W R/W R/W R/W R/W R/W R/W
Note: * Undefined
The SC port data register (SCPDR) is a 7-bit readable/writable and 1-bit read-only register that
stores data for pins SCPT7 to SCPT0. Bits SCP7DT to SCP0DT correspond to pins SCPT7 to
SCPT0. When the pin function is general output port, if the port is read, the value of the
corresponding SCPDR bit is returned directly. When the function is general input port, if the port
is read, the corresponding pin level is read. Table 19.24 shows the function of SCPDR.
SCPDR is initialized to B'*0000000 by a power-on reset. After initialization, the general input
port function (pull-up MOS on) is set as the initial pin function, and the corresponding pin levels
are read from bits SCP7DT—SCP5DT, SCP3DT, and SCP1DT. SCPDR retains its previous
value in standby mode and sleep mode, and in a manual reset.
Note that the low level is read if bit 7 is read except in general-purpose input.
When the pin states of the RxD2 to RxD0 of the SCP4DT, SCP2DT, and SCP0DT bits in SCPDR
are read while the TE and RE bits in SCSCR are not cleared to 0, the RE bit in SCSCR should be
set to 1. When the RE bit is set to 1, the RxD pins become an input state and their pin states can be
read prior to the SCPCR setting.