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Rev. 5.00, 09/03, page 166 of 760
7.2.10 Execution Times Break Register (BETR)
When the execution-times break condition of channel B is enabled, this register specifies the
number of execution times to make the break. The maximum number is 2
12
– 1 times. A power-on
reset initializes BETR to H'0000. When a break condition is satisfied, it decreases the BETR. A
break is issued when the break condition is satisfied after the BETR becomes H'0001. Bits 15-12
are always read as 0 and 0 should always be written in these bits.
Bit: 15 14 13 12 11 10 9 8
————
Initial value:00000000
R/W:RRRRR/WR/WR/WR/W
Bit:76543210
Initial value:00000000
R/W: R/W R/W R/W R/W R/W R/W R/W R/W