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Rev. 5.00, 09/03, page 328 of 760
Channel 3: In this channel, direct address mode or indirect address transfer mode can be
specified.
• Reload function: The value that was specified in the source address register can be
automatically reloaded every four DMA transfers. This function is only available in channel 2.
• Transfer requests
External request (From two DREQ pins (channels 0 and 1 only). DREQ can be detected
either by the falling edge or by low level.)
On-chip module request (Requests from on-chip peripheral modules such as serial
communications interface (IrDA and SCIF), A/D converter (A/D) and a timer (CMT). This
request can be accepted in all the channels.)
Auto request (The transfer request is generated automatically within the DMAC.)
• Selectable bus modes: Cycle-steal mode or burst mode
• Selectable channel priority levels:
Fixed mode: The channel priority is fixed.
Round-robin mode: The priority of the channel in which the execution request was accepted is
made the lowest.
• Interrupt request: An interrupt request to the CPU can be generated after the specified number
of transfers.