Rev. 5.00, 09/03, page 263 of 760
Table 10.10 32-Bit External Device/Little-Endian Access and Data Alignment
Data Bus Strobe Signals
Operation D31–D24 D23–D16 D15–D8 D7–D0
W
WW
WE
EE
E3
33
3,
DQMUU
W
WW
WE
EE
E2
22
2,
DQMUL
W
WW
WE
EE
E1
11
1,
DQMLU
W
WW
WE
EE
E0
00
0,
DQMLL
Byte access
at 0
———Data
7–0
Asserted
Byte access
at 1
——Data
7–0
—Asserted
Byte access
at 2
—Data
7–0
—— Asserted
Byte access
at 3
Data
7–0
— ——Asserted
Word access
at 0
——Data
15–8
Data
7–0
Asserted Asserted
Word access
at 2
Data
15–8
Data
7–0
— — Asserted Asserted
Longword
access at 0
Data
31–24
Data
23–16
Data
15–8
Data
7–0
Asserted Asserted Asserted Asserted
Table 10.11 16-Bit External Device/Little-Endian Access and Data Alignment
Data Bus Strobe Signals
Operation
D31–
D24
D23–
D16 D15–D8 D7–D0
W
WW
WE
EE
E3
33
3,
DQMUU
W
WW
WE
EE
E2
22
2,
DQMUL
W
WW
WE
EE
E1
11
1,
DQMLU
W
WW
WE
EE
E0
00
0,
DQMLL
Byte access at 0 — — — Data
7–0
Asserted
Byte access at 1 — — Data
7–0
—Asserted
Byte access at 2 — — — Data
7–0
Asserted
Byte access at 3 — — Data
7–0
—Asserted
Word access at 0 — — Data
15–8
Data
7–0
Asserted Asserted
Word access at 2 — — Data
15–8
Data
7–0
Asserted Asserted
1st time
at 0
——Data
15–8
Data
7–0
Asserted AssertedLongword
access
at 0
2nd time
at 2
——Data
31–24
Data
23–16
Asserted Asserted