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Rev. 5.00, 09/03, page 119 of 760
6.1.3 Pin Configuration
Table 6.1 shows the INTC pin configuration.
Table 6.1 INTC Pins
Name Abbreviation I/O Description
Nonmaskable interrupt
input pin
NMI I Input of interrupt request signal, not
maskable by the interrupt mask bits in
SR.
Interrupt input pins IRQ5–IRQ0
IRL3–IRL0
IRLS3-IRLS0
I Input of interrupt request signals,
maskable by the interrupt mask bits in
SR.
Port interrupt input pins PINT0–PINT15 I Input of port interrupt request signals,
maskable by the interrupt mask bits in
SR.
Bus request output pin IRQOUT O Output of signal that notifies external
devices that an interrupt source or
memory refresh has occurred