Filter
Top Products
Rev. 5.00, 09/03, page 41 of 760
Table 2.7 lists the SH7709S arithmetic instructions.
Table 2.7 Arithmetic Instructions
Instruction Operation Code
Privileged
Mode Cycles T Bit
ADD Rm,Rn Rn + Rm → Rn 0011nnnnmmmm1100 —1—
ADD #imm,Rn Rn + imm → Rn 0111nnnniiiiiiii —1—
ADDC Rm,Rn Rn + Rm + T → Rn,
Carry → T
0011nnnnmmmm1110 — 1 Carry
ADDV Rm,Rn Rn + Rm → Rn,
Overflow → T
0011nnnnmmmm1111 —1Overflow
CMP/EQ #imm,R0 If R0 = imm, 1 → T 10001000iiiiiiii — 1 Comparison
result
CMP/EQ Rm,Rn If Rn = Rm, 1 → T 0011nnnnmmmm0000 — 1 Comparison
result
CMP/HS Rm,Rn If Rn ≥ Rm with
unsigned data, 1 → T
0011nnnnmmmm0010 — 1 Comparison
result
CMP/GE Rm,Rn If Rn ≥ Rm with signed
data, 1 → T
0011nnnnmmmm0011 — 1 Comparison
result
CMP/HI Rm,Rn If Rn > Rm with
unsigned data, 1 → T
0011nnnnmmmm0110 — 1 Comparison
result
CMP/GT Rm,Rn If Rn > Rm with signed
data, 1 → T
0011nnnnmmmm0111 — 1 Comparison
result
CMP/PZ Rn If Rn ≥ 0, 1 → T 0100nnnn00010001 — 1 Comparison
result
CMP/PL Rn If Rn > 0, 1 → T 0100nnnn00010101 — 1 Comparison
result
CMP/STR Rm,Rn If Rn and Rm have an
equivalent byte, 1 → T
0010nnnnmmmm1100 — 1 Comparison
result
DIV1 Rm,Rn Single-step division
(Rn/Rm)
0011nnnnmmmm0100 — 1 Calculation
result
DIV0S Rm,Rn MSB of Rn → Q, MSB
of Rm → M, M ^ Q → T
0010nnnnmmmm0111 — 1 Calculation
result
DIV0U 0 → M/Q/T 0000000000011001 —10