Rev. 5.00, 09/03, page 598 of 760
19.7.2 Port F Data Register (PFDR)
Bit:76543210
PF7DT PF6DT PF5DT PF4DT PF3DT PF2DT PF1DT PF0DT
Initial value: ********
R/W:RRRRRRRR
Note: * Undefined
The port F data register (PFDR) is an 8-bit read-only register that stores data for pins PTF7 to
PTF0. Bits PF7DT to PF0DT correspond to pins PTF7 to PTF0. When the function is general
input port, if the port is read the corresponding pin level is read. Table 19.12 shows the function of
PFDR.
PFDR is initialized by a power-on reset, after which the general input port function (pull-up MOS
on) is set as the initial pin function, and the corresponding pin levels are read.
Table 19.12 Port F Data Register (PFDR) Read/Write Operations
PFnMD1 PFnMD0 Pin State Read Write
0 0 Other function
(see table 18.1)
H'00 Ignored (no effect on pin state)
1 Reserved H'00 Ignored (no effect on pin state)
1 0 Input (Pull-up
MOS on)
Pin state Ignored (no effect on pin state)
1 Input (Pull-up
MOS off)
Pin state Ignored (no effect on pin state)
(n = 0 to 7)