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Rev. 5.00, 09/03, page 357 of 760
• Single Address Mode
In single address mode, either the transfer source or transfer destination peripheral device is
accessed (selected) by means of the DACK signal, and the other device is accessed by address.
In this mode, the DMAC performs one DMA transfer in one bus cycle, accessing one of the
external devices by outputting the DACK transfer request acknowledge signal to it, and at the
same time outputting an address to the other device involved in the transfer. For example, in
the case of transfer between external memory and an external device with DACK shown in
figure 11.9, when the external device outputs data to the data bus, that data is written to the
external memory in the same bus cycle.
DMAC
SH7709S
DACK
DREQ
External address bus External data bus
External
memory
External device
with DACK
Data flow
Figure 11.9 Data Flow in Single Address Mode
Two kinds of transfer are possible in single address mode: (1) transfer between an external
device with DACK and a memory-mapped external device, and (2) transfer between an
external device with DACK and external memory. In both cases, only the external request
signal (DREQ) is used for transfer requests.
Figures 11.10 and 11.11 show examples of DMA transfer timing in single address mode.