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Rev. 5.00, 09/03, page 756 of 760
Register BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 Module
TI3 TI2 TI1 TI0 — — — —SDIR
————————
UDI
SCSMR1 IRM0D ICK3 ICK2 ICK1 ICK0 PSEL CKS1 CKS0 IrDA
SCBRR1 IrDA
SCSCR1 TIE RIE TE RE — — CKE1 CKE0 IrDA
SCFTDR1 IrDA
PER3 PER2 PER1 PER0 FER3 FER2 FER1 FER0SCSSR1
ER TEND TDFE BRK FER PER RDF DR
IrDA
SCFRDR1 IrDA
SCFCR1 RTRG1 RTRG0 TTRG1 TTRG0 MCE TFRST RFRST LOOP IrDA
———T4T3T2T1T0SCFDR1
— — —R4R3R2R1R0
IrDA
SCSMR2 — CHR PE O/E STOP — CKS1 CKS0 SCIF
SCBRR2 SCIF
SCSCR2 TIE RIE TE RE — — CKE1 CKE0 SCIF
SCFTDR2 SCIF
PER3 PER2 PER1 PER0 FER3 FER2 FER1 FER0SCSSR2
ER TEND TDFE BRK FER PER RDF DR
SCIF
SCFRDR2 SCIF
SCFCR2 RTRG1 RTRG0 TTRG1 TTRG0 MCE TFRST RFRST LOOP SCIF
———T4T3T2T1T0SCFDR2
— — —R4R3R2R1R0
SCIF
Legend
MMU: Memory management unit
UBC: User break controller
CPG: Clock pulse generator
BSC: Bus state controller
RTC: Realtime clock
INTC: Interrupt controller
TMU: Timer unit
SC1: Serial communication interface controller
IrDA: Serial communication interface with IrDA
SCIF: Serial communication interface with FIFO
CCN: Cache controller
DMAC: Direct memory access controller
ADC: Analog to Digital converter
DAC: Digital to Analog converter
PORT: Port controller
UDI: User debugging interface