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Rev. 5.00, 09/03, page 434 of 760
14.2.4 Transmit Data Register (SCTDR)
The transmit data register (SCTDR) is an 8-bit register that stores data for serial transmission.
When the SCI detects that the transmit shift register (SCTSR) is empty, it moves transmit data
written in SCTDR into SCTSR and starts serial transmission. Continuous serial transmission is
possible by writing the next transmit data in SCTDR during serial transmission from SCTSR.
The CPU can always read and write to SCTDR. SCTDR is initialized to H'FF by a reset and in
standby or module standby mode.
Bit:76543210
Initial value:11111111
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
14.2.5 Serial Mode Register (SCSMR)
The serial mode register (SCSMR) is an 8-bit register that specifies the SCI serial communication
format and selects the clock source for the baud rate generator.
The CPU can always read and write to SCSMR. SCSMR is initialized to H'00 by a reset and in
standby or module standby mode.
Bit:76543210
C/A CHR PE O/E STOP MP CKS1 CKS0
Initial value:00000000
R/W: R/W R/W R/W R/W R/W R/W R/W R/W
Bit 7—Communication Mode (C/A
AA
A): Selects whether the SCI operates in asynchronous or
synchronous mode.
Bit 7: C/A
AA
A Description
0 Asynchronous mode (Initial value)
1 Synchronous mode