Renesas SH7709S Stereo System User Manual


 
Rev. 5.00, 09/03, page 602 of 760
19.9.2 Port H Data Register (PHDR)
Bit:76543210
PH7DT PH6DT PH5DT PH4DT PH3DT PH2DT PH1DT PH0DT
Initial value: 0 *******
R/W:R/WRRRRRRR
Note: * Undefined
The port H data register (PHDR) is a 1-bit readable/writable and 7-bit read-only register that stores
data for pins PTH7 to PTH0. Bits PH7DT to PH0DT correspond to pins PTH7 to PTH0. When the
pin function is general output port, if the port is read, the value of the corresponding PHDR bit is
returned directly. When the function is general input port, if the port is read, the corresponding pin
level is read. Table 19.16 shows the function of PHDR.
PHDR is initialized to B'0******* by a power-on reset, after which the general input port function
(pull-up MOS on) is set as the initial pin function, and the corresponding pin levels are read. It
retains its previous value in standby mode and sleep mode, and in a manual reset.
Note that the low level is read if bits 6 to 0 are read except in general-purpose input.
Table 19.16 Port H Data Register (PHDR) Read/Write Operations
PHnMD1 PHnMD0 Pin State Read Write
0 0 Other function
(see table 18.1)
PHDR value Value is written to PHDR, but does not
affect pin state
1 Output PHDR value Write value is output from pin
1 0 Input (Pull-up
MOS on)
Pin state Value is written to PHDR, but does not
affect pin state
1 Input (Pull-up
MOS off)
Pin state Value is written to PHDR, but does not
affect pin state
(n = 7)
PHnMD1 PHnMD0 Pin State Read Write
0 0 Other function
(see table 18.1)
Low level Ignored (no effect on pin state)
1 Reserved Low level Ignored (no effect on pin state)
1 0 Input (Pull-up
MOS on)
Pin state Ignored (no effect on pin state)
1 Input (Pull-up
MOS off)
Pin state Ignored (no effect on pin state)
(n = 0 to 6)