Filter
Top Products
Rev. 5.00, 09/03, page 184 of 760
Bit 7—Standby (STBY): Specifies transition to standby mode.
Bit 7: STBY Description
0 Executing SLEEP instruction puts chip into sleep mode (Initial value)
1 Executing SLEEP instruction puts chip into standby mode
Bits 6, 5, and 3—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 4—Standby Crystal (STBXTL): Specifies halting or operating of the clock pulse generator
in standby mode.
Bit 4: STBXTL Description
0 Clock pulse generator is halted in standby mode (Initial value)
1 Clock pulse generator is operates in standby mode
Bit 2—Module Standby 2 (MSTP2): Specifies halting of the clock supply to the timer unit TMU
(an on-chip peripheral module). When the MSTP2 bit is set to 1, the supply of the clock to the
TMU is halted.
Bit 2: MSTP2 Description
0 TMU runs (Initial value)
1 Clock supply to TMU is halted
Bit 1—Module Standby 1 (MSTP1): Specifies halting of the clock supply to the realtime clock
RTC (an on-chip peripheral module). When the MSTP1 bit is set to 1, the supply of the clock to
the RTC is halted. When the clock halts, all RTC registers become inaccessible, but the counter
keeps running.
Bit 1: MSTP1 Description
0 RTC runs (Initial value)
1 Clock supply to RTC is halted
Before switching the RTC to module standby, access at least one among the registers RTC, SCI,
and TMU.