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Rev. 5.00, 09/03, page 525 of 760
Bit 3—Framing Error (FER): Indicates a framing error in the data read from the receive FIFO
data register (SCFRDR).
Bit 3: FER Description
0 No receive framing error occurred in the data read from SCFRDR (Initial value)
[Clearing conditions]
(1) When the chip undergoes a power-on reset or enters standby mode
(2) When no framing error is present in the data read from SCFRDR
1 A receive framing error occurred in the data read from SCFRDR
[Setting condition]
When a framing error is present in the data read from SCFRDR
Bit 2—Parity Error (PER): Indicates a parity error in the data read from the receive FIFO data
register (SCFRDR).
Bit 2: PER Description
0 No receive parity error occurred in the data read from SCFRDR (Initial value)
[Clearing conditions]
(1) When the chip undergoes a power-on reset or enters standby mode
(2) When no parity error is present in the data read from SCFRDR
1 A receive framing error occurred in the data read from SCFRDR
[Setting condition]
When a parity error is present in the data read from SCFRDR