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Rev. 5.00, 09/03, page 454 of 760
Table 14.9 Serial Mode Register Settings and SCI Communication Formats
SCSMR Settings SCI Communication Format
Bit 7
C/A
AA
A
Bit 6
CHR
Bit 5
PE
Bit 2
MP
Bit 3
STOP Mode
Data
Length
Parity
Bit
Multipro-
cessor Bit
Stop Bit
Length
0 0 0 0 0 Asynchronous 8-bit Not set Not set 1 bit
12 bits
10 Set 1 bit
12 bits
1 0 0 7-bit Not set 1 bit
12 bits
10 Set 1 bit
12 bits
0 * 1 0 8-bit Not set Set 1 bit
* 12 bits
1 * 0 7-bit 1 bit
* 1
Asynchronous
(multiprocessor
format)
2 bits
1 **** Synchronous 8-bit Not set None
Note: Asterisks (*) indicate don’t care bits.
Table 14.10 SCSMR and SCSCR Settings and SCI Clock Source Selection
SCSMR SCSCR Settings SCI Transmit/Receive Clock
Bit 7
C/A
AA
A
Bit 1
CKE1
Bit 0
CKE0 Mode
Clock
Source
SCK
Pin Function
0 0 0 Internal SCI does not use the SCK pin
1 Outputs a clock with frequency
matching the bit rate
1 0 External
1
Asynchronous
mode
Inputs a clock with frequency 16
times the bit rate
1 0 0 Internal Outputs the synchronous clock
1
1 0 External Inputs the synchronous clock
1
Synchronous
mode