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Rev. 5.00, 09/03, page 614 of 760
20.1.2 Block Diagram
Figure 20.1 shows a block diagram of the A/D converter.
10-bit
D/A
ADDRA
ADDRB
ADDRD
Bus interface
Peripheral data bus
Analog
multi-
plexer
Control circuit
Successive approxi-
mation register
+
−
Comparator
Sample-and-
hold circuit
ADI
interrupt
signal
AV
SS
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
φ/8
φ/16
ADCSR
ADCR
AV
CC
A/D converter
A
DCR: A/D control register
A
DCSR: A/D control/status register
A
DDRA: A/D data register A
A
DDRB: A/D data register B
A
DDRC: A/D data register C
A
DDRD: A/D data register D
Legend
Internal
data bus
ADTRG
ADDRC
Figure 20.1 Block Diagram of A/D Converter