Renesas SH7709S Stereo System User Manual


 
Rev. 5.00, 09/03, page 4 of 760
Item Features
Serial communi-
cation interface 0
(SCI0/SCI)
Asynchronous mode or clock synchronous mode can be selected
Full-duplex communication
Supports smart card interface
Serial communi-
cation interface 1
(SCI1/IrDA)
16-byte FIFO for transmission/reception
DMA can be transferred
IrDA: interface based on 1.0
Serial communi-
cation interface 2
(SCI2/SCIF)
16-byte FIFO for transmission/reception
DMA can be transferred
Hardware flow control
Direct memory
access controller
(DMAC)
4 channels
Burst mode and cycle-steal mode
Data transfer size: 8-/16-/32-bit and 16-byte
I/O port
Twelve 8-bit ports
A/D converter
(ADC)
10 bits ± 4 LSB, 8 channels
Conversion time: 16 µs
Input range: 0–AVcc (max. 3.6 V)
D/A converter
(DAC)
8 bits ± 4 LSB, 2 channels
Conversion time: 10 µs
Output range: 0–AVcc (max. 3.6 V)
Product lineup
Power Supply Voltage
Abbr. I/O Internal
Operating
Frequency
Model Name Package
SH7709S 3.3±0.3 V 2.0±0.15 V
*
200 MHz HD6417709SHF200B 208-pin plastic
HQFP (FP-208E)
1.9±0.15 V 167 MHz HD6417709SF167B 208-pin plastic
LQFP (FP-208C)
HD6417709SBP167B 240-pin CSP
(BP-240A)
1.8+0.25 V
1.8–0.15 V
133 MHz HD6417709SF133B 208-pin plastic
LQFP (FP-208C)
HD6417709SBP133B 240-pin CSP
(BP-240A)
1.7+0.25 V
1.7–0.15 V
100 MHz HD6417709SF100B 208-pin plastic
LQFP (FP-208C)
HD6417709SBP100B 240-pin CSP
(BP-240A)
Note: * 2.0 (+0.15, –0.1) V when an IRL or IRLS interrupt is used.