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Rev. 5.00, 09/03, page 213 of 760
9.5 Changing the Frequency
The frequency of the internal clock and peripheral clock can be changed either by changing the
multiplication ratio of PLL circuit 1 or by changing the division ratios of dividers 1 and 2. All of
these are controlled by software through the frequency control register. The methods are described
below. To the FRQCR register, do not set values other than those given in table 9.4.
9.5.1 Changing the Multiplication Rate
A PLL settling time is required when the multiplication rate of PLL circuit 1 is changed. The on-
chip WDT counts the settling time.
1. In the initial state, the multiplication rate of PLL circuit 1 is 1.
2. Set a value that will become the specified oscillation settling time in the WDT and stop the
WDT. The following must be set:
WTCSR register TME bit = 0: WDT stops
WTCSR register CKS2–CKS0 bits: Division ratio of WDT count clock
WTCNT counter: Initial counter value
3. Set the desired value in the STC2 to STC0 bits. The division ratio can also be set in the IFC2–
IFC0 bits and PFC2–PFC0 bits.
4. The processor pauses internally and the WDT starts incrementing. In clock modes 0–2 and 7,
the internal and peripheral clocks both stop. (except for the peripheral clock supplied to the
WDT)
5. Supply of the clock that has been set begins at WDT count overflow, and the processor begins
operating again. The WDT stops after it overflows.
When the following three conditions are all met, FRQCR should not be changed while a DMAC
transfer is in progress.
• Bits IFC2 to IFC0 are changed.
• STC2 to STC0 are not changed.
• The clock ratio of Iφ (on-chip clock) to Bφ (bus clock) after the change is other than 1:1.
9.5.2 Changing the Division Ratio
The WDT will not count unless the multiplication ratio is changed simultaneously.
1. In the initial state, IFC2–IFC0 = 000 and PFC2–PFC0 = 010.
2. Set the IFC2, IFC1, IFC0, PFC2, PFC1, and PFC0 bits to the new division ratio. The values
that can be set are limited by the clock mode and the multiplication ratio of PLL circuit 1. Note
that if the wrong value is set, the processor will malfunction.
3. The clock is immediately supplied at the new division ratio.