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Rev. 5.00, 09/03, page 584 of 760
Bits 5 and 4—SCP2 Mode 1 and 0 (SCP2MD1, SCP2MD0): These bits select the pin function
and perform input pull-up MOS control.
Bit 5 Bit 4
SCP2MD1 SCP2MD0 Pin Function
0 0 Transmit data output 1 (TxD1)
Receive data input 1 (RxD1) (Initial value)
0 1 General output (SCPT[2] output pin)
Receive data input 1 (RxD1)
1 0 SCPT[2] input pin pull-up (input pin)
Transmit data output 1 (TxD1)
1 1 General input (SCPT[2] input pin)
Transmit data output 1 (TxD1)
Note: There is no SCPT[2] simultaneous I/O combination because one bit (SCP2DT) is accessed
using two pins, TxD1 and RxD1.
When port input is set (bit SCPnMD1 is set to 1) and when the TE bit in SCSCR is set to 1, the
TxD1 pin is in the output state. When the TE bit is cleared to 0, the TxD1 pin goes to the high-
impedance state.
Bits 3 and 2—SCP1 Mode 1 and 0 (SCP1MD1, SCP1MD0): These bits select the pin function
and perform input pull-up MOS control.
Bit 3 Bit 2
SCP1MD1 SCP1MD0 Pin Function
0 0 Other function (see table 18.1)
0 1 Port output
1 0 Port input (Pull-up MOS: on) (Initial value)
1 1 Port input (Pull-up MOS: off)