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Rev. 5.00, 09/03, page 128 of 760
Table 6.5 Interrupt Exception Handling Sources and Priority (IRL Mode)
Interrupt Source
INTEVT Code
(INTEVT2 Code)
Interrupt
Priority
(Initial Value)
IPR (Bit
Numbers)
Priority
within IPR
Setting Unit
Default
Priority
NMI H'1C0 (H'1C0) 16 — — High
UDI H'5E0 (H'5E0) 15 — —
IRL IRL(3:0)
*
2
= 0000 H'200 (H'200) 15 — —
IRL(3:0)
*
2
= 0001 H'220 (H'220) 14 — —
IRL(3:0)
*
2
= 0010 H'240 (H'240) 13 — —
IRL(3:0)
*
2
= 0011 H'260 (H'260) 12 — —
IRL(3:0)
*
2
= 0100 H'280 (H'280) 11 — —
IRL(3:0)
*
2
= 0101 H'2A0 (H'2A0) 10 — —
IRL(3:0)
*
2
= 0110 H'2C0 (H'2C0) 9 — —
IRL(3:0)
*
2
= 0111 H'2E0 (H'2E0) 8 — —
IRL(3:0)
*
2
= 1000 H'300 (H'300) 7 — —
IRL(3:0)
*
2
= 1001 H'320 (H'320) 6 — —
IRL(3:0)
*
2
= 1010 H'340 (H'340) 5 — —
IRL(3:0)
*
2
= 1011 H'360 (H'360) 4 — —
IRL(3:0)
*
2
= 1100 H'380 (H'380) 3 — —
IRL(3:0)
*
2
= 1101 H'3A0 (H'3A0) 2 — —
IRL(3:0)
*
2
= 1110 H'3C0 (H'3C0) 1 — —
IRQ IRQ4 H'200–3C0
*
1
(H'680) 0–15 (0) IPRD (3–0) —
IRQ5 H'200–3C0
*
1
(H'6A0) 0–15 (0) IPRD (7–4) —
PINT PINT0–7 H'200–3C0
*
1
(H'700) 0–15 (0) IPRD (15–12) —
PINT8–15 H'200–3C0
*
1
(H'720) 0–15 (0) IPRD (11–8) —
DMAC DEI0 H'200–3C0
*
1
(H'800) 0–15 (0) IPRE (15–12) High
DEI1 H'200–3C0
*
1
(H'820)
DEI2 H'200–3C0
*
1
(H'840)
DEI3 H'200–3C0
*
1
(H'860) Low
IrDA ERI1 H'200–3C0
*
1
(H'880) 0–15 (0) IPRE (11–8) High
RXI1 H'200–3C0
*
1
(H'8A0)
BRI1 H'200–3C0
*
1
(H'8C0)
TXI1 H'200–3C0
*
1
(H'8E0) Low Low