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Rev. 5.00, 09/03, page 201 of 760
Normal*
3
STATUS
CA
CKIO, CKIO2*
6
Standby*
2
Reset*
1
R
ESETP
Undefined
2 Rcyc or more*
5
0−10 Bcyc*
4
Standby
WDT operation
Notes: 1. Reset: HH (STATUS1 high, STATUS0 high)
2. Standby: LH (STATUS1 low, STATUS0 high)
3. Normal: LL (STATUS1 low, STATUS0 low)
4. Bcyc: Bus clock cycle
5. Rcyc: EXTAL2 (32.768 kHz) cycle
6. The CKIO2 output is available only in clock modes 0, 1, and 2.
Figure 8.11 Hardware Standby Mode Timing
(When CA Goes Low during WDT Operation on Standby Mode Cancellation)