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Rev. 5.00, 09/03, page 275 of 760
T
1
CKIO
A25 to A0
CSn
RD/WR
RD
D31 to D0
WEn
D31 to D0
WAIT
Tw Tw Tw T
2
Read
Write
BS
Wait states inserted
by WAIT signal
Figure 10.11 Basic Interface Wait State Timing (Wait State Insertion by W
WW
WA
AA
AI
II
IT
TT
T Signal
WAITSEL = 1)