Renesas SH7709S Stereo System User Manual


 
Rev. 5.00, 09/03, page 494 of 760
Bits 3 to 0: These bits have the same function as in the ordinary SCI. See section 14, Serial
Communication Interface (SCI), for more information. The setting conditions for bit 2, the
transmit end bit (TEND), are changed as follows.
Bit 2: TEND Description
0 Transmission is in progress
[Clearing condition]
Cleared by reading TDRE when TDRE = 1, then writing 0 to TDRE
1 End of transmission (Initial value)
[Setting conditions]
(1) the chip is reset or enters standby mode,
(2) the TE bit in SCSCR is 0 and the FER/ERS bit is also 0,
(3) the C/A bit in SCSMR is 0, and TDRE = 1 and FER/ERS = 0 (normal
transmission) 2.5 etu after a one-byte serial character is transmitted, or
(4) the C/A bit in SCSMR is 1, and TDRE = 1 and FER/ERS = 0 (normal
transmission) 1.0 etu after a one-byte serial character is transmitted.
Note: etu: Elementary Time Unit (time for transfer of 1 bit).
15.3 Operation
15.3.1 Overview
The primary functions of the smart card interface are described below.
1. Each frame consists of 8-bit data and 1 parity bit.
2. During transmission, the card leaves a guard time of at least 2 etu (elementary time units: time
for transfer of 1 bit) from the end of the parity bit to the start of the next frame.
3. During reception, the card outputs an error signal low level for 1 etu after 10.5 etu has elapsed
from the start bit if a parity error was detected.
4. During transmission, it automatically transmits the same data after allowing at least 2 etu from
the time the error signal is sampled.
5. Only start-stop type asynchronous communication functions are supported; no synchronous
communication functions are available.