Renesas SH7709S Stereo System User Manual


 
Rev. 5.00, 09/03, page 550 of 760
16.4 SCIF Interrupts
The SCIF has four interrupt sources: transmit-FIFO-data-empty (TXI), receive-error (ERI),
receive-data-full (RXI), and break (BRI).
Table 16.10 shows the interrupt sources and their order of priority. The interrupt sources are
enabled or disabled by means of the TIE and RIE bits in SCSCR. A separate interrupt request is
sent to the interrupt controller for each of these interrupt sources.
When the TDFE flag in the serial status register (SCSSR) is set to 1, a TXI interrupt request is
generated. The DMAC can be activated and data transfer performed when this interrupt is
generated. When data exceeding the transmit trigger number is written to the transmit data register
(SCFTDR) by the DMAC, 1 is read from the TDFE flag, after which 0 is written to it to clear it.
When the RDF flag in SCSSR is set to 1, an RXI interrupt request is generated. The DMAC can
be activated and data transfer performed when the RDF flag in SCSSR is set to 1. When receive
data less than the receive trigger number is read from the receive data register (SCFRDR) by the
DMAC, 1 is read from the RDF flag, after which 0 is written to it to clear it.
When the ER flag in SCSSR is set to 1, an ERI interrupt request is generated.
When the BRK flag in SCSSR is set to 1, a BRI interrupt request is generated.
The TXI interrupt indicates that transmit data can be written, and the RXI interrupt indicates that
there is receive data in SCFRDR.
Table 16.10 SCIF Interrupt Sources
Interrupt
Source Description
DMAC
Activation
Priority on
Reset Release
ERI Interrupt initiated by receive error flag (ER) Not possible High
RXI Interrupt initiated by receive data FIFO full flag
(RDF) or data ready flag (DR)
Possible
(RDF only)
BRI Interrupt initiated by break flag (BRK) Not possible
TXI Interrupt initiated by transmit FIFO data empty
flag (TDFE)
Possible
Low
See section 4, Exception Handling, for priorities and the relationship to non-SCIF interrupts.