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Rev. 5.00, 09/03, page xvii of xliv
Contents
Section 1 Overview and Pin Functions
.......................................................................... 1
1.1 SH7709S Features.............................................................................................................1
1.2 Block Diagram .................................................................................................................. 6
1.3 Pin Description.................................................................................................................. 7
1.3.1 Pin Assignment .................................................................................................... 7
1.3.2 Pin Function ......................................................................................................... 9
Section 2 CPU
....................................................................................................................... 19
2.1 Register Configuration ...................................................................................................... 19
2.1.1 Privileged Mode and Banks.................................................................................. 19
2.1.2 General Registers ................................................................................................. 22
2.1.3 System Registers .................................................................................................. 23
2.1.4 Control Registers.................................................................................................. 23
2.2 Data Formats ..................................................................................................................... 25
2.2.1 Data Format in Registers...................................................................................... 25
2.2.2 Data Format in Memory....................................................................................... 25
2.3 Instruction Features ........................................................................................................... 26
2.3.1 Execution Environment........................................................................................ 26
2.3.2 Addressing Modes................................................................................................ 28
2.3.3 Instruction Formats............................................................................................... 32
2.4 Instruction Set.................................................................................................................... 35
2.4.1 Instruction Set Classified by Function.................................................................. 35
2.4.2 Instruction Code Map........................................................................................... 50
2.5 Processor States and Processor Modes.............................................................................. 53
2.5.1 Processor States.................................................................................................... 53
2.5.2 Processor Modes .................................................................................................. 54
Section 3 Memory Management Unit (MMU)
............................................................ 55
3.1 Overview........................................................................................................................... 55
3.1.1 Features ................................................................................................................ 55
3.1.2 Role of MMU....................................................................................................... 55
3.1.3 SH7709S MMU.................................................................................................... 58
3.1.4 Register Configuration ......................................................................................... 61
3.2 Register Description.......................................................................................................... 61
3.3 TLB Functions................................................................................................................... 63
3.3.1 Configuration of the TLB..................................................................................... 63
3.3.2 TLB Indexing....................................................................................................... 65
3.3.3 TLB Address Comparison.................................................................................... 66
3.3.4 Page Management Information ............................................................................ 68