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Rev. 5.00, 09/03, page 665 of 760
t
EXH
t
EXF
t
EXR
t
EXL
t
EXcyc
V
IH
V
IH
V
IH
1/2 V
CC
Q
1/2 V
CC
Q
V
IL
V
IL
EXTAL*
(input)
Note: * The clock input from the EXTAL pin.
Figure 23.1 EXTAL Clock Input Timing
t
CKIH
t
CKIF
t
CKIR
t
CKIL
t
CKIcyc
V
IH
1/2 V
CC
Q
1/2 V
CC
Q
V
IH
V
IL
V
IH
V
IL
CKIO
(input)
Figure 23.2 CKIO Clock Input Timing
t
cyc
t
CKOL
t
CKOH
V
OH
1/2V
CC
Q
CKIO
(output)
1/2V
CC
Q
t
CKOR
t
CKOF
V
OH
V
OL
V
OL
V
OH
t
CK2D
t
CK2D
V
OH
CKIO2
(output)
t
CK2O
R
t
CK2OF
V
OH
V
OL
V
OL
V
OH
Figure 23.3 CKIO Clock Output Timing