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Appendix A: Memory and Register Mapping
AM700 Audio Measurement Set Service Manual
A-19
6. DMA Write Access: DSA5 → DSW5
a. DI stored DSW5 DMA WRITE BUFFER
b. generated DMA Trigger (IRQB)
7. DMA Write Access: DSA6 → DSW6
a. DI stored DSW6 DMA WRITE BUFFER
b. generated DMA Trigger (IRQB)
8. DMA Write Access: DSA7 → DSW7
a. DI stored DSW7 DMA WRITE BUFFER
b. generated DMABR
c. If DMABG asserted, write 4 long words to DRAM
d. generated DMA Trigger (IRQB)
9. DSP Write to DMA Reset Register (DRR) to stop the process.
NOTE.
To abort any DMA transfer at any time, the DSP is required to write to DRR at
address $05000000. In addition, DSP SW reset, 68040 soft reset, ONCE Interface reset,
and Global SW reset have the same effect.