Filter
Top Products
Theory of Operation
AM700 Audio Measurement Set Service Manual
3–53
Controlling signals for the operation of the Front Panel logic are produced by
U106, a PAL (programmable array logic) device.
Video ASIC and VRAM (diagram 8)
Refer to schematic diagram 8 of the A6 CPU board for the following discussion.
The Video RAM is composed of four, 512 × 512, 8-bit memory devices, U117,
U118, U119, and U120. Each memory has a 2 Mbit capacity, and the total
memory provides for two pages of display. The CPU writes new information to
one page of display while the other is being processed by the video ASIC
(application specific integrated circuit), U103. The CPU reads or writes to the
Video RAM through four, 8-bit bus buffers, U111, U112, U113, and U114. There
are two modes of writing to the memory. One mode takes 20 writes to transfer
enough data to display one line on the CRT, the other mode is a flash write used
to rapidly clear the display. The Video RAM is partitioned in eight bit planes,
and the bits of the display data from the CPU are stored interleaved across the
eight bit planes.
The Video ASIC, U103, processes the display data written to the Video RAM by
the CPU. When the Video ASIC is reading data from the Video RAM, it gets the
interleaved bits sequentially from each of the eight bit planes. The Video ASIC
reformats the data to deinterleave the bits, and places the bits in a long, 64-bit
FIFO (first in, first out) data pipeline. Pixel data bytes are then taken out of the
FIFO in parallel and applied to the Video RAM/DAC, U37 and U15 (diagram 9),
for conversion to analog display signals in the correct order for the raster display.
Horizontal and Vertical Sync signals and Blanking are also produced by the
Video ASIC.
If a repeating bad pattern appears in the display, one of the Video RAM devices
or one of the bus buffers to the CPU data bus may be defective. Missing pixels in
the display may also be the result of a defective memory or buffer. A totally
wrong display may be the result of a Video ASIC failure.
The data bits for a pixel to the Video RAM are interleaved across the eight bit
planes of the memory, so the data bytes that are being written to memory have no
correlation with the data bytes being sent to the Video DAC/RAM.
Front Panel PAL
Video RAM
Video ASIC
Troubleshooting Hint