1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
J32
J32
CONNECTS
TO J1 TO J26
3 6
A7
DSP
BOARD
A1A1
ANALOG
ACQUISITION
BOARD
C140
0.1UF
R235
100.0
R232
100.0
R233
100.0
INBCK
D
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
R231
100
D0
49
D1
50
D2
53
D3
55
D4
56
D5
58
D6
59
D7
61
D8
62
D9
64
D10
65
D11
67
D12
68
D13
70
D14
71
D15
73
D16
74
D17
76
D18
77
D19
79
D20
80
D21
82
D22
84
D23
85
TD0
104
TD1
106
TD2
107
TD3
109
TD4
110
TD5
112
TD6
113
TD7
115
A1LD
17
A1LDS
19
A1LDE
20
A1RD
22
A1RDS
23
A1RDE
25
A1BCLK
26
A1SENSE
28
A1LSH0
29
A1LSH1
31
A1LSH2
32
A1LSH3
34
A1RSH0
38
A1RSH1
40
A1RSH2
41
A1RSH3
44
A1LSB/MSB
46
A2LD
7
A2LDS
8
A2LDE
10
A2RD
11
A2RDE
14
A2LSH0
124
A2LSH1
125
A2LSH2
127
A2LSH3
128
A2RDS
13
A2RSH0
130
A2RSH1
131
A2RSH2
1
A2RSH3
2
A2LSB/MSB
122
TRIG
16
EYEIN
121
EYECLK
119
EYEDS
118
XMITVERS
97
A/D
47
MCLK
37
RST
98
A2BCLK
4
A2SENSE
5
TIDENT
116
TCLK
103
DSP_RD
94
DSP_CE
91
DSP_WR
95
DSP_DATA/CTL
89
DSP_LSW/MSB
88
DSP_L/R
86
GND
132
GND
126
GND
120
GND
105
GND
99
GND
93
GND
78
GND
72
GND
66
GND
60
GND
54
GND
48
GND
42
GND
36
GND
30
GND
24
GND
18
GND
12
GND
6
VDD
129
VDD
123
VDD
114
VDD
102
VDD
96
VDD
90
VDD
81
VDD
75
VDD
69
VDD
63
VDD
57
VDD
51
VDD
45
VDD
39
VDD
27
VDD
21
VDD
15
VDD
9
NC
35
NC
43
NC
52
NC
83
NC
92
NC
101
DSP
100
TX/RX
117
GND
111
VDD
33
VDD
3
GND
87
VDD
108
U101
TXMIT
H3
1
D[0..23]
D[0..23]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
E5
G1
10
E1 9
D4
D2
7
LD1
SYNTH_UNLOCK
ER_CLEAR
LD0
IN0
1
IN1
2
IN2
3
IN3
19
IN4
20
IN5
21
IN6
22
IN7
23
IN8
24
IN9
25
IN10
41
IN11
42
IN12
43
IN13
44
IO0
5
IO1
6
IO2
7
IO3
8
IO4
9
IO5
10
IO6
40
IO7
39
IO8
38
IO9
37
IO10
36
IO11
35
IO12
18
IO13
17
IO14
16
IO15
15
IO16
14
IO17
13
IO18
27
IO19
28
IO20
29
IO21
30
IO22
31
IO23
32
VCC
11
GND
33
VCC
12
GND
34
NC
4
NC
26
U102
ATV2500PLCC
BCK2 SMDATA2
ASTART2
AEND2
BSTART2
BEND2
BCK1
BEND1
ASTART1
BSTART1
SF_RST
R2
R1
INERF
D
E3
E3
E3
9
E3
E3
E1
E4
E1
D1
D1
9
INWCK
INBCK
INDATA
REFBCK
REFWCK
REFCBL
REFDATA
REFERF
INERF
STX_FREERUN
(TRIG)
CLK1536
FREE_RUN
G2
B110
SMDATA1
AEND1
+5V
D
C4
C4
2
INCBL
ASTART1
SMDATA1
D21
D22
D23
SMDATA1
ASTART1
AEND1
BSTART1
BEND1
BCK1
D
D
D
C136
0.1UF
C137
0.1UF
D D
C138
0.1UF
R412
10.0K
C139
0.1UF
D D
+5V
+5V
R234
221
D5
9
(REM_STX_RST)
CLOCK SENSE
R394
1.21K
G2
G3
10
(STX_VERS)
SMDATA2
BSTART2
BEND2
ASTART2
AEND2
BCK2
+5V
D
D
D
H5
H5
H5
11
EYE_DATA
EYE_CLK
EYE_START
C5
D5
9
F5
D4
D4
1
G21
A[0..15]
(STX_RESET)
(STXDSP)
(STX_CE)
OSC
(STX_RD)
(STX_WR)
A0
A1
A2
A[0..15]
+5V
D
AM 700 SAMPLE TRANSMITTER
PART OF A3 DIGITAL AUDIO BOARD
3
DATA FORMATTER PAL
SAMPLE TRANSMITTER