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CALB+
4
3
2
K7B B1
2
A
4
3
2
K6B
TP32
LOGIC 0 SETS VOUT
SINE WAVE OSCILLATOR
CAL CHOPPER
U78 IS SHOWN
ACTUATED.
15
16 1
4 3
10
9 8
5 6
11 12
13 14
U78
DG403
A
TP31
A
VIN
2
VOUT
6
GND
4
TRIM
5
U76
LT1021-5
R259
392
TP30
A
+15V
C259
0.1UF
R256
18.2K
R255
24.3K
C262
0.1UF
+5VA
5.0V .05% REFERENCE
A
A
A
A
A
R327
2.49K
R326
2.49K
A
C344
10UF
VR9
3.0V
+2.5V
C263
10UF
TP29
120 Hz 50/50 DUTY CYCLE
+3V
12.288MHz
A
+15V
-15V
+5VA
A
+5VD
A3
4
+5VD
R339
10.0K
2 3
1
U121A
74HC125
3
4
U111B
74HCT14
TO O.O V
PIN
2
SCK
5
SID
6
LATI
7
CLKIN
14
CLKOUT1
3
CLKOUT2
4
GAIN
13
VOUT
10
VREF
9
VSS
1
AGND
11
DGND
12
VCC
8
U80
ML2036
OSC_RUN
L(LATCH)
CONTROL_CLK
+2.5V
R276
100
VOUT +/- 2.5V SINE
A
A
+5VA
C267
0.1UF
+5VA
A
C268
0.1UF
-5VA2
TP39
BCALA
A
A
A
+5VD
10 1
K6A
+5VD
10 1
K8A
7
8
9
K8C
4
3
2
K8B
B3
1
CALB-
CALA+
CALA-
7
8
9
K7C B3
2
B1
1
B3
1
+5VD
10 1
K7A
CAL_SEL
CALB+/-
CALA+/-
+5VD
ARESET
B55
B3
2
BCALB
IN2
2
IN3
3
IN4
4
IN5
5
IN6
6
IN7
7
D2
15
D3
14
D4
13
D5
12
D7
10
IN1
1
CLAMP
9
GND
8
D1
16
D6
11
U82
MC1413
A
C269
0.1UF
CALA
CALB
CALA+/-
CALB+/-
CAL_SEL
A
1
QA
3
B
2
QB
4
QC
5
QD
6
QE
10
CLK
8
QF
11
QG
12
CLR
9
QH
13
U105
74ALS164
+5VD
+5VD
READ-BACK
A
1
QA
3
B
2
QB
4
QC
5
QD
6
QE
10
CLK
8
QF
11
QG
12
CLR
9
QH
13
U104
74ALS164
+5VD
+5VD
16 CLOCK DELAY FOR
DATA READ-BACK
HELD LOW WHEN DISABLED
SO CHOP OUT = AGND.
CONTROLAIND
2
Q
5
CK
3
Q
6
P
R
4
C
L
1
U79A
74ALS74
(TRIG_EN)
CHOP_EN
B3
4
H1
4
A4
2
A4
1
(CLEARTRIP)
240 Hz ASTABLE
A
R257
2.74K
1
2
U106A
74ALS04
DIS
7
THR
6
CV
5
TRIG
2
RST
4
VCC
8
GND
1
OUT
3
U77
LM555
A
+5VA
C261
.01UF
A
A
A
R258
5.11K
C260
.1UF
Q1
REAR
PANEL
EXT.
TRIG.
1
2
3
J28
9 8
1
0
U121C
74HC125
9
8
U111D
74HCT14
+5VD
C320
33PF
R290
10.0K
5 6
U111C
74HCT14
5 6
4
U121B
74HC125
R338
10.0K
5
6
U106C
74ALS04
CR29
CR30
TRIGOUT
ADCSELA
CHA_HBNOT
CHA_HRNOT
CHB_HBNOT
CHB_HRNOT
CHA_TERM
F3
5
B1
5
A5
A5
A3
A3
3
A3
4
(RESET)
SER
SRCLK
RCLK
1QA
6
1QB
7
1QC
8
1QD
9
1QE
10
1QF
11
1QG
12
1QH
13
2QA
14
2QB
15
2QC
16
2QD
17
2QE
18
2QF
19
2QG
20
2QH
21
3QA
22
3QB
23
3QC
24
3QD
25
3QE
26
3QF
27
3QG
28
3QH
29
4QA
30
4QB
31
4QC
32
4QD
33
4QE
34
4QF
35
4QG
36
4QH
37
SER
3
RCLK
5
SRCLK
4
VCC
1
VCC
80
GND
2
GND
79
9QH
77
9QG
76
9QF
75
9QE
74
9QD
73
9QC
72
9QB
71
9QA
70
8QH
69
8QG
68
8QF
67
8QE
66
8QD
65
8QC
64
8QB
63
8QA
62
7QH
61
7QG
60
7QF
59
7QE
58
7QD
57
7QC
56
7QB
55
7QA
54
6QH
53
6QG
52
6QF
51
6QE
50
6QD
49
6QC
48
6QB
47
6QA
46
5QA
38
5QB
39
5QC
40
5QD
41
5QE
42
5QF
43
5QG
44
5QH
45
DOUT
78
U116
SHIFT72SIMM80
CONTROL_CLK
(RESET)
ANF9
ANF10
ANF11
ANF12
HI = TEST ACTIVE
ADCAL
(XMITVERS)
TEST_ENABLE
CHB_ATTEN0
CHB_ATTEN1
CHB_ATTEN2
CHB_ATTEN3
(TRIG_EN)
OSC_RUN
CHOP_EN
CAL_SEL
CALB+/-
CALA+/-
CALB
CALA
B3
F4
5
H1 4
A2
5
A5
2
3.072MHz
XFERCLK
STFLAG
TD[0..7]
TD1
TD2
TD3
TD4
TD6
TD5
TD7
TD[0..7]
TD0
1 2
U111A
74HCT14
(BLATCH)
G15
G15
G1
5
R330
100
H4
4
A3
4
R331
100
R332
100
1 16
2 15
3 14
4 13
5 12
6 11
7 10
8 9
R333
100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
J26
J26
CONNECTS
TO J32
3
CONTROL_CLK
(DATA_LOAD)
CONTROL_DATA
L(LATCH)
CONTROL_CLK
A3
4
A3
AUDIO
DIG.
BOARD
J26
CONNECTS
3
A7
BOARD
&
TO J1
DSP
R329
100
SER IN
1
A
2
B
3
C
4
D
5
E
10
F
11
G
12
H
14
QH
13
CLK
7
CK INH
6
SH/LD
15
CLR
9
U109
74ALS166
+5VD
READ-BACK
CONTROL_CLK
OVER
UNDER
+5VD
CALBUSY
(TERMB)
(TERMA)
CHB_ATTEN[0..3]
A4
5
A4
5
H24
B1 5
A5
1
E5
1
A41
A42
A3 5
CHA_ATTEN[0..3]
CHB_GAIN[0..3]
CHA_GAIN0
CHB_GAIN0
CHB_GAIN1
CHB_GAIN2
CHB_GAIN3
CHB_ATTEN[0..3]
CHB_GAIN[0..3]
CHA_GAIN[0..3]
CHA_ATTEN[0..3]
CHA_GAIN3
CHA_GAIN2
CHA_GAIN1
CHA_ATTEN0
CHA_ATTEN1
CHA_ATTEN2
CHA_ATTEN3
CHA_GAIN[0..3]
CHA_150TERM
TEST_CLK
BGENSOURCE
CHA_150TERM
BNF0
BNF1
BNF2
A5
A5 1
E5
2
CHA/(CHB)SEL
(CLROVRANGE)
+5VD
ANF0
ANF1
ANF2
ANF3
ANF4
ANF5
ANF6
ANF7
ANF8
BNF3
BNF4
BNF5
BNF6
BNF7
BNF8
BNF9
BNF10
BNF11
BNF12
CHB_TERM
A4
1
A4
2
MAIN POWER
13 12
U111F
74HCT14
11 10
U111E
74HCT14
12 11
1
3
U121D
74HC125
9
8
U106D
74ALS04
11 10
U106E
74ALS04
13
12
U106F
74ALS04
1
2
3
4
5
J25
J25
CONNECTS
TO J9
1
A11
POWER
SUPPLY
+15V
-15V
CHASSIS
F2
7A
L1
5UH
GND
C281
1000UF
M10
+5V
R
VCC
C274
0.1UF
+5VD
+5V
GND
TP40
TP23
HIGHEST BITS GO TO
OFFSET AND OSC. CONTROL.
C291
0.1UF
C292
0.1UF
C290
0.1UF
CHB_150TERM
AGENSOURCE
ANF[0..12]
BNF[0..12]
BNF[0..12]
CONTROLBIN
ANF[0..12]
BGENSOURCE
C3
3
C1
3
A3 4
A5
A5 2
DATA OUTPUT LOADER
12.288MHz TO
GENERATOR
(DATA_LOAD)
RI+
8
RI-
7
DO+
6
DO-
5
RO
2
DI
3
VCC
1
GND
4
U110
DS8921
+5VD
12.288MHZ
TRIGOUT
H22
R301
100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
J27
12.288A
12.288B
C342
0.1UF
J27
CONNECTS
TO J53
11
A6
MAIN/CPU
BOARD
+15V
-15V
A
CHA/(CHB)SEL
(CLROVRANGE)
OVER
UNDER
BRANGE
ARANGE
H21
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
J300
A A
+5VA1
C214
0.1UF
C218
10UF
A A
C213
0.1UF
C217
10UF
-5VA1
TP35
+5VA
-5VA2
A A
A
U61
7805
C219
10UF
C215
0.1UF
A
A A
C220
10UF
C216
0.1UF
U62
7905
A
A A A A
U98
7805
C287
10UF
C283
0.1UF
C284
0.1UF
C288
10UF
A
A A A A
U101
79L05
C295
10UF
C293
0.1UF
C294
0.1UF
C296
10UF
TP38
A GND CONN. TO PLANE
AT 470uF CAPS.
POWER TO PLANES
AT CAP PINS ONLY
POWER TO PLANES
AT CAP PINS ONLY
+15V
-15V
C280
0.1UF
A
TP41
TP43
TP42
C279
0.1UF
A
C277
470UF
F3
5A
L2
80UH
F4
5A
C278
470UF
L3
80UH
AM 700
TP37
CALIBRATION, CONTROL REGISTERS, INTERFACE AND POWER SUPPLIES
TP36
PART OF A1A1 ANALOG ACQUISITION BOARD
6
CONNECTS TO
J1 ONOVER/UNDER
BOARD
A1A7
ISOLATED POWER SUPPLIES
RELAY DRIVER
READ-BACK REGISTER CLOCK DELAY
CONTROL REGISTER
CHOPPER
PRECISION REFERENCE
TTL TRIGGER INPUT
READ-
BACK
REGISTER
DIRVER