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5-30 Intel® PXA255 Processor Developer’s Manual
DMA Controller
0x4000_0174 DRCMR29 reserved
0x4000_0178 DRCMR30
Request to Channel Map Register for USB endpoint 6
Request
0x4000_017C DRCMR31
Request to Channel Map Register for USB endpoint 7
Request
0x4000_0180 DRCMR32
Request to Channel Map Register for USB endpoint 8
Request
0x4000_0184 DRCMR33
Request to Channel Map Register for USB endpoint 9
Request
0x4000_0188 DRCMR34 reserved
0x4000_018C DRCMR35
Request to Channel Map Register for USB endpoint 11
Request
0x4000_0190 DRCMR36
Request to Channel Map Register for USB endpoint 12
Request
0x4000_0194 DRCMR37
Request to Channel Map Register for USB endpoint 13
Request
0x4000_0198 DRCMR38
Request to Channel Map Register for USB endpoint 14
Request
0x4000_019C DRCMR39 reserved
0x4000_0200 DDADR0 DMA Descriptor Address Register channel 0
0x4000_0204 DSADR0 DMA Source Address Register channel 0
0x4000_0208 DTADR0 DMA Target Address Register channel 0
0x4000_020C DCMD0 DMA Command Address Register channel 0
0x4000_0210 DDADR1 DMA Descriptor Address Register channel 1
0x4000_0214 DSADR1 DMA Source Address Register channel 1
0x4000_0218 DTADR1 DMA Target Address Register channel 1
0x4000_021C DCMD1 DMA Command Address Register channel 1
0x4000_0220 DDADR2 DMA Descriptor Address Register channel 2
0x4000_0224 DSADR2 DMA Source Address Register channel 2
0x4000_0228 DTADR2 DMA Target Address Register channel 2
0x4000_022C DCMD2 DMA Command Address Register channel 2
0x4000_0230 DDADR3 DMA Descriptor Address Register channel 3
0x4000_0234 DSADR3 DMA Source Address Register channel 3
0x4000_0238 DTADR3 DMA Target Address Register channel 3
0x4000_023C DCMD3 DMA Command Address Register channel 3
0x4000_0240 DDADR4 DMA Descriptor Address Register channel 4
0x4000_0244 DSADR4 DMA Source Address Register channel 4
0x4000_0248 DTADR4 DMA Target Address Register channel 4
0x4000_024C DCMD4 DMA Command Address Register channel 4
0x4000_0250 DDADR5 DMA Descriptor Address Register channel 5
0x4000_0254 DSADR5 DMA Source Address Register channel 5
Table 5-13. DMA Controller Register Summary (Sheet 3 of 5)
Address Name Description