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Timer Registers
2-27
MSP50C614 Architecture
(16-bit wide location)
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
PRD1 register
†
address 0x3A
PPPPPPPPPPPPPPPP
TIMER1 Period
TIM1 register
†
address 0x3B
TTTTTTTTTTTTTTTT
TIMER1 Count-Down Triggers INT1 on underflow
PRD2 register
address 0x3E
PPPPPPPPPPPPPPPP
TIMER2 Period
TIM2 register
address 0x3F
TTTTTTTTTTTTTTTT
TIMER2 Count-Down Triggers INT2 on underflow
P : period register (initial counter value)
T : count-down register (counts from the value in P)
0x0000 : default state of both registers after RESET LOW
†
TIMER1 may be associated with the comparator function, if the comparator enable bit is set. Refer to Section 3.3,
Comparator
,
for details.
Reading from either the PRD or the TIM returns the current state of the register.
This can be used to monitor the progress of the TIM register at any time.
Writing to the PRD register does not change the TIM register until the TIM
register has finished decrementing to 0x0000. The new value in the PRD
register is then loaded to the TIM register, and counting resumes from the new
value.
Note: Writing to the TIM Register
Writing to the TIM register causes the same value to be written to the PRD
register. In this case, the TIM register is immediately updated, and counting
continues immediately from the new value.
Each TIMER decrements its count-down register at a fixed clock rate. The rate
is selectable between two existing clock sources: the reference oscillator or
1/2 Master Clock. The rate of the master clock (MC) is programmable. It is
determined by the value loaded to the PLL multiplier (Section 2.9.3,
Clock
Speed Control Register
). The source to the TIMER is therefore one-half the
frequency of the programmed master clock (1/2 MC). If, instead, the reference
oscillator is selected as the source to the TIMER, then the source is either a
resistor-trimmed oscillator (RTO) or a crystal oscillator (CRO). Both reference
oscillators are designed to run at a nominal 32 kHz. Refer to Section 2.9,
Clock Control
, for more information regarding the oscillator configuration and
clock programmability.