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Conditionals
4-69
Assembly Language Instructions
4.12 Conditionals
The condition bits in the status register (STAT) are used to modify program
control through conditional branches and calls. Various combinations of bits
are available to provide a rich set of conditional operations. These condition
bits can also be used in Boolean operations to set the test flags TF1 and TF2
in the status register.
STAT register
bit settings
Arithmetic/Logic
Condition
Condition
mnemonic
Alternate
†
mnemonic
’NOT’
‡
condition
mnemonic
’NOT’
‡
condition
alternate
†
mnemonic
ZF = 1 Zero flag ZF NZF
SF = 1 Sign flag SF NSF
CF = 1 Carry flag CF NCF
ZF = 0 & CF = 0 Below (unsigned) B NAE NB AE
ZF = 0 & CF = 1 Above (unsigned) A NBE NA BE
ZF = 1 & SF = 0 Greater (signed) G NLE NG LE
ZF = 1 & OF = 0 Equal E NE
OF = 1 Overflow flag OF NOF
ZF = 0 & SF = 1 Less (signed) L NGE NL GE
RCF = 1 R
x
carry flag RCF RNCF
RZF = 0 & RCF = 1 R
x
above (unsigned) RA RNBE RNA RBE
RZF = 1 R
x
equal RE RZ RNE RNZ
TF1 = 1 Test flag 1 TF1 NTF1
TF2 = 1 Test flag 2 TF2 NTF2
TAG = 1 Memory tag TAG NTAG
IN1
§
Input line 1 IN1 NIN1
IN2
§
Input line 2 IN2 NIN2
XZF = 1 Transfer zero flag XZF XNZF
XSF = 1 Transfer sign flag XSF XNSF
XZF = 0 & XSF = 0 Transfer greater (signed) XG XNLE XNG XLE
†
Alternate mnemonics are provided to help program readability. They generate the same opcodes as the associated condition.
‡
Status Register (STAT) bit settings are inverted for NOT conditions.
§
Hardware lines used for I/O expansion design. These lines are PA0 and PA1.