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Individual Instruction Descriptions
4-138
4.14.44 MULTPL Multiply and Transfer PL to Accumulator
Syntax
[label] name dest, src
[
, mod
] Clock,
clk
Word,
w
With RPT,
clk
Class
MULTPL A
n
, {
adrs
} Table 4–46 Table 4–46 1b
MULTPL A
n
[~], A
n
[~] [,
next A
] 1 1 n
R
+3 3
Execution [premodify AP if
mod
specified]
PH,PL ⇐ MR *
src
A
n
⇐ PL
PC ⇐ PC + 1
Flags Affected OF, SF, ZF, CF are set accordingly
src
is {
adrs
}: TAG bit is set accordingly
Opcode
Instructions 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
MULTPL A
n
, {
adrs
}
0 1 1 0 0 0 0 A
n adrs
x
dma16
(for direct) or
offset16
(long relative) [see section 4.13]
MULTPL A
n
[~], A
n
[~], [
next A
] 1 1 1 0 0
next A
A
n
1 1 0 1 1 0 A~ ~A
Description Perform multiplication of multiply register (MR) and value of
src
. The 16 MSBs
of the 32-bit product are stored in the product high (PH) register. The 16 LSBs
of the product (contained in product low (PL) register) are stored in A
n
. Certain
restrictions apply to the use of this instruction when interrupts are occuring in
the background. See Section 4.8 for more detail.
Syntax Description
MULTPL {
adrs
} Multiply MR by data memory word, move PL to A
n
MULTPL A
n
[~], A
n
[~] [,
next A
] Multiply MR by An[~] word, move PL to A
n
[~]
See Also MULTPLS, MULAPL, MULAPLS, MULSPL, MULSPLS
Example 4.14.44.1 MULTPL A0, *R3++
Multiply the contents of R3 with MR register and store PL in accumulator A0. Increment R3 by 2.
Example 4.14.44.2 MULTPL A2, A2~, ––A
Multiply MR register to accumulator A2~ and store PL to accumulator A2.