Texas Instruments MSP50C614 Stereo System User Manual


 
MSP50P614/MSP50C614 Computational Modes
4-51
Assembly Language Instructions
Example 4.6.2 SXM
MOV STR, 2–2 ; string length=2
MOV MR, 0x8000
MOV A0, 0x8000, ++A ; load MS Byte
MOV A0, 0x0000, ––A ; load LS Byte
MULTPLS A0, A0
This example illustrates the sign extension mode on a string during
multiplication. Here, two negative numbers 0x80000000 and 0x8000 are
multiplied to obtain a positive number 0x400000000000. If the signs were not
extended, we would have obtained 0xC00000000000, a negative number.
Unsigned Mode: The multiplier unsigned mode may be enabled/disabled by
setting/resetting the UM bit of the STAT. When in unsigned mode, the 17
th
bit
of the multiplier is loaded as zero to indicate an unsigned value. When UM is
set to zero, signed multiplication is enabled and the multiplier copies the MSB
of the multiplier (16
th
bit) to the 17
th
bit of the multiplier.
Example 4.6.1 MOV A0, 0x8000
MOVU MR, A0
MOV A0, 0x80
MULTPL A0, A0
In this example, we do an unsigned multiplication between 0x8000 and 0x80.
The first two lines set up the MR register with value 0x8000 and switch to
unsigned multiplication mode. Line 3 loads A0 with 0x80 and line 4 multiplies
the values in unsigned mode. The lower 16 bits of the result is stored in A0 and
the upper 16 bits are stored in PH. The final result is 0x400000, where PH
holds the value 0x0040 and A0 holds the lower 16 bits. Notice that if the
multiplication is not done in unsigned mode, the MR is treated as negative. We
would have obtained 0xFFC00000 (PH = 0xFFC0, A0 = 0000), which is the
negative value of the previous result. The key to unsigned multiplication is the
MOVU instruction in the second line which set the UM bit to 1 in the STAT
register and switches the multiplication mode to unsigned.
Overflow Mode: The accumulator’s overflow mode may be enabled/disabled
by setting/resetting the OM bit of STAT. When the computation is in the
overflow mode and an overflow occurs, the overflow flag is set and the
accumulator is loaded with either the most positive or the most negative value
representable in the accumulator, depending upon the direction of the
overflow. In string mode, instead of representing the most positive or most
negative value, only the 16-bit MSB is set to 0x7FFF or 0x8000 depending on
direction of overflow. The remaining words of the accumulator string are
unchanged. If the OM status register bit is reset and an overflow occurs, the
overflowed results are placed in the accumulator without modification. Note
that logical operations cannot result in overflow.