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170 Index
D (continued)
digitizers
accuracy
, 158
adding RAM
, 19
addressing registers
, 121
adjustment procedures
, 164
adjustments
, 163
application examples
, 42
base address
, 122
block diagram
, 33
cable connector assembly
, 27
cabling considerations
, 23
calibration
, 163
calibration bus output port
, 24
Calibration Flash ROM Address register
, 131
Calibration Flash ROM Data register
, 132
calibration intervals
, 163
Calibration Source register
, 132
channel block diagram
, 34
command types
, 45
configuring
, 19
CVTable Channel 1 register
, 130
CVTable Channel 2 register
, 130
CVTable Channel 3 register
, 131
CVTable Channel 4 register
, 131
description
, 13
Device Type register
, 126
E1563A front panel features
, 15
E1563A gain adjustment
, 166
E1564A front panel features
, 16
E1564A gain adjustment
, 167
error messages
, 145
external trigger input port
, 24
external triggering
, 38
FIFO High Word/Low Word registers
, 128
Filter Bandwidth verification test
, 157
front panel features
, 14
Gain Verification performance test
, 156
ID register
, 126
initial operation
, 30
input cabling, 2-wire
, 24
input cabling, 3-wire
, 24
input model
, 25
input overload
, 36
installing in mainframe
, 22
internal triggering
, 37
Interrupt Control register
, 129
Interrupt Source register
, 130
digitizers (cont’d)
master-slave operation
, 38
measurement uncertainty
, 158
memory sizes
, 13
Noise Verification perfomance test
, 155
Offset and Cache Count register
, 128
operation
, 33
overload voltages
, 14
performance test conditions
, 152
Performance Test Record
, 158
power-on state
, 35
Pre-Trigger Count High Word register
, 136
Pre-Trigger Count Low Word register
, 137
Range, Filter, Connect Channel 3, 4 register
, 133
READ registers
, 125
recommended test equipment
, 151
register descriptions
, 124
register offset
, 123
register-based programming
, 121
reset state
, 35
Sample Control register
, 138
Sample Count High Byte register
, 137
Sample Count Low Word register
, 137
Sample Period High Byte register
, 136
Sample Period Low Word register
, 136
Samples Taken High Byte register
, 131
Samples Taken Low Word register
, 131
SCPI commands
, 45
setting interrupt line
, 21
setting logical address
, 21
specifications
, 119
Status/Control register
, 126
Test Accuracy Ratio
, 158
trigger block diagram
, 35
Trigger Control register
, 137
trigger input port cables
, 24
trigger sources
, 37
Trigger/Interrupt Level Channel 1 register
, 134
Trigger/Interrupt Level Channel 2 register
, 135
Trigger/Interrupt Level Channel 3 register
, 135
Trigger/Interrupt Level Channel 4 register
, 136
triggering
, 37
verification tests
, 151
WRITE registers
, 124
Zero Adjustment procedures
, 165
Zero Offset verification test
, 154
digitizers application examples
, 42
documentation history
, 10