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ESG-D SERIES RF BLOCK DIAGRAM (OPTION UN7 with UN8)
A SYNTHESIZER BOARD
2
2
d/dt
FM
Om
/
.5-1 GHz
5 MHz
VARIABLE
MODULUS
PRESCALER
FRACTIONAL
DIVIDE
X2
X2
f
F
LIN_AM_MOD
LIN_AM_MOD
PULSE MOD
D REFERENCE BOARD
LF OUT
EXT 1
INPUT
EXT 2
INPUT
EXT REF
FM_MOD
FEED FORWARD AM
sk775b
PLL
PLL
10 MHz BW
PULSE MOD
1 GHz PLL
10 MHz
SYNTH
1 GHz
REF
10 MHz
OUT
10 MHz PLL
E BASEBAND GENERATOR BOARD (UN8)
F DATA GENERATOR BOARD
DATA_CLOCK
10 MHz DIG
EXT 13 MHz
EVENT 1
PATTERN
TRIG
EVENT 2
EXT
I INPUT
EXT
Q INPUT
B OUTPUT BOARD
ALC
MODULATOR
DRIVER
DETECTOR
SHAPING
DAC
DAC
DAC
DAC
DAC
DAC
DAC
ALC
MODULATOR
BURST
MODULATOR
DRIVER
IQ MODULATOR
BURST
MODULATOR
.75-1 GHz.75-1 GHz
.0-.25 GHz.0-.25 GHz
.25-4 GHz
0
90
VBLO
QUAD
.25-4 GHz
AUX
OUT
CARRIER)
(COHERENT
10 MHz SYNTH
CAL
VOLTAGE
CAL
VOLTAGE
I GAIN
Q GAIN
I OFFSET
Q OFFSET
ALC REF
ALC
HOLD
HOLD ALC
IN_BAND_AM
LIN_BURST
LOG_BURST
1 GHz REF
RPP
50
C ATTENUATOR
/RPP
5dB STEP
ATTENUATOR
ALC
DETECTOR
ESG-D SERIES RF BLOCK DIAGRAM (OPTION UN7 with UN8)
BURST_ENVELOPE
-1V_REF
ALC_REF
BURST
INT_ Q_MOD
DATA
SWITCH
INT_ I_MOD
MASTER
CLOCK-PLL
MASTER_CLK
PLL_LCK_SIG
PLL_CLOCK
L DATA_CLK
BBG_BIT_CLK
SUB_I_COUNT
BUF_DATA_IN
L_BURST
BURST_GATE
USER_DATA
SYMBOL_SYNC
SCRAMBLE_RUN
SYMBOL_SYNC
DATA
GENERATION
CONTROL
BURST MOD
SWITCH & FILTERS
DAC
DAC
EXT_SYNC
DATA
EXT_BURST
INTERNAL DATA
GENERATOR
(PATTERN RAM)
UN3=1M
UN4=8M
CONTROL
BURST & DELAY
BURST_PLS
BURST_PULSE
G BERT MEASURMENT BOARD (UN7)
INPUT
BERT
DATA IN
BERT
CLK IN
BERT
GATE IN
BERT ASIC
BER
SYNC LOSS
BER
NO DATA
BER
ERR OUT
BER
TEST OUT
BER
MEAS END
DSP
BER
Calculation