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TMS320C6202
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS072B – AUGUST 1998 – REVISED AUGUST 1999
56
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
EXPANSION BUS ASYNCHRONOUS HOST PORT TIMING (CONTINUED)
word
99
14
13
14
13
4
3
4
3
4
3
4
3
12
11
12
11
4
3
4
3
10
10
XCS
XCNTL
XBE[3:0]
/XA[5:2]
†
XR/W
‡
XR/W
‡
XD[31:0]
XRDY
1
2
1
Word
†
XBE[3:0]/XA[5:2] operates as byte enables XBE[3:0] during host-port accesses.
‡
XW/R input/output polarity selected at boot
Figure 37. External Device as Asynchronous Master—Write
ADVANCE INFORMATION