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TMS320C6202
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS072B – AUGUST 1998 – REVISED AUGUST 1999
40
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
SYNCHRONOUS DRAM TIMING (CONTINUED)
CLKOUT2
CEx
BE[3:0]
EA[15:2]
ED[31:0]
SDA10
SDRAS
/SSOE
†
SDCAS
/SSADS
†
SDWE
/SSWE
†
10
9
18
17
2
1
REFR
†
SDCAS/SSADS, SDRAS/SSOE, and SDWE/SSWE operate as SDCAS, SDRAS, and SDWE, respectively, during SDRAM accesses.
Figure 21. SDRAM REFR Command
CLKOUT2
CEx
BE[3:0]
EA[15:2]
ED[31:0]
SDA10
SDRAS
/SSOE
†
SDCAS
/SSADS
†
SDWE
/SSWE
†
MRS Value
14
10
18
6
2
1
5
17
9
13
MRS
†
SDCAS/SSADS, SDRAS/SSOE, and SDWE/SSWE operate as SDCAS, SDRAS, and SDWE, respectively, during SDRAM accesses.
Figure 22. SDRAM MRS Command
ADVANCE INFORMATION