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Actual DC-BUS voltage < DC-BUS
start voltage ?
Is enabled PI PFC stage
regulator calculation ?
Increment required DC-BUS voltage by ramp step
voltage
Required DC-BUS voltage > DC-BUS
start voltage ?
Required DC-BUS voltage = DC-BUS start voltage
Calculate PI PFC stage regulator for
reference sine gain
no
no
Has start time gone ?
faultISR()
Measure DC-BUS voltage
Actual DC-BUS voltage >
maximum allowed DC-BUS
voltage ?
faultISR()
Has time interval for keep maximu m
frequency gone ?
no
phase 2 - Keep maximum
frequency
Test DC-BUS voltage on limits
Is enabled PI PFC stage
regulator calculation ?
2
yes
yes
yes
no
no
yes
yes
no
Set maximum ballast frequency and time interval
Enable HRP
yes
Calculate PI PFC stage regulator for
reference sine gain
yes
3
no
Required DC-BUS voltage = DC-BUS run voltage
phase 1 - Reach DC-bus
voltage
phase 1 - Reach DC-bus
voltage
PVAL1 = DUTY_CYCLE_MAX;
Is DCM HW variation selected ?
yes
no
Software Design
Dimmable Light Ballast with Power Factor Correction, Rev. 1
48 Freescale Semiconductor
Figure 5-8. Flow Chart — Main Flow, Part 2