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Chapter 18 CPU Baseboard: Description/Setting Configuration Jumpers
225
Memory Connectors, J23 and J20: Rows D & E (continued)
Signal Pin Signal Pin
GND D17 MD_L(4) E17
GND D18 GND E18
GND D19 RCGCLK1 [A,B] E19
GND D20 GND E20
GND D21 MEM[A,B]_TMS E21
GND D22 MA_L(13) E22
GND D23 MA_L(10) E23
MA_L(8) D24 +1.5V E24
GND D25 MA_L(5) E25
GND D26 GND E26
GND D27 RCGCLK0-[A,B] E27
GND D28 GND E28
GND D29 ROW_L E29
BANK0_L D30 +1.5V E30
GND D31 CMND0_L E31
GND D32 GND E32
GND D33 SDRAM [A,B]_CLK E33
GND D34 GND E34
GND D35 Reserved E35
MD_L(70) D36 Reserved E36
GND D37 MD_L(67) E37
MD_L(65) D38 +1.5V E38
GND D39 MD_L(63) E39
MD_L(61) D40 GND E40
GND D41 MD_L(59) E41
MD_L(58) D42 GND E42
GND D43 MD_L(57) E43
MD_L(55) D44 GND E44
GND D45 Reserved E45
Reserved D46 +1.5V E46
GND D47 MD_L(51) E47
MD_L(49) D48 GND E48
GND D49 MD_L(47) E49
MD_L(45) D50 +1.5V E50
GND D51 MD_L(43) E51
MD_L(41) D52 GND E52
GND D53 MD_L(38) E53
MD_L(36) D54 +1.5V E54