Texas Instruments TMS320C6727 Stereo System User Manual


 
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4.16Real-TimeInterrupt(RTI)TimerWithDigitalWatchdog
4.16.1RTI/DigitalWatchdogDevice-SpecificInformation
McASP0,1,2
Transmit/Receive
DMA Events
McASP0,1,2
Transmit/Receive
DMA Events
Counter 0
32-Bit + 32-Bit Prescale
(Used by DSP BIOS)
Capture 0
32-Bit + 32-Bit Prescale
Counter 1
32-Bit + 32-Bit Prescale
Capture 1
32-Bit + 32-Bit Prescale
Compare 0
32-Bit
RTI Interrupt 0
SYSCLK2
RTI Interrupt 1
Compare 1
32-Bit
RTI Interrupt 2
Compare 2
32-Bit
RTI Interrupt 3
Compare 3
32-Bit
RESET
(Internal Only)
Digital Watchdog
25-Bit Counter
Watchdog Key Register
16-Bit Key
Controlled by
CFGRTI Register
TMS320C6727,TMS320C6726,TMS320C6722
Floating-PointDigitalSignalProcessors
SPRS268EMAY2005REVISEDJANUARY2007
C672xincludesanRTItimermodulewhichisusedtogenerateperiodicinterrupts.Thismodulealso
includesanoptionaldigitalwatchdogfeature.Figure4-40containsablockdiagramoftheRTImodule.
Figure4-40.RTITimerBlockDiagram
TheRTItimermoduleconsistsoftwoindependentcounterswhicharebothclockedfromSYSCLK2(but
maybestartedindividuallyandmayhavedifferentprescalersettings).
Thecountersprovidethetimebaseagainstwhichfouroutputcomparatorsoperate.Thesecomparators
maybeprogrammedtogenerateperiodicinterrupts.Thecomparatorsincludeanadderwhich
automaticallyupdatesthecomparevalueaftereachperiodicinterrupt.ThismeansthattheDSPonly
needstoinitializethecomparatoroncewiththeinterruptperiod.
ThetwoinputcapturescanbetriggeredfromanyoftheMcASP0,McASP1,orMcASP2DMAevents.The
deviceconfigurationregisterwhichselectstheMcASPeventstomeasureisdefinedinTable4-37.
Measuringthetimedifferencebetweentheseeventsprovidesanaccuratemeasureofthesampleratesat
whichtheMcASPsaretransmittingandreceiving.Thismeasurementcanbeusefulasahardwareassist
forasoftwareasynchronoussamplerateconverteralgorithm.
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