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4.18.2PLLRegistersDescription(s)
TMS320C6727,TMS320C6726,TMS320C6722
Floating-PointDigitalSignalProcessors
SPRS268E–MAY2005–REVISEDJANUARY2007
Table4-41isalistofthePLLregisters.Formoreinformationabouttheseregisters,seethe
TMS320C672xDSPSoftware-ProgrammablePhase-LockedLoop(PLL)ControllerReferenceGuide
(literaturenumberSPRU879).
Table4-41.PLLControllerRegisters
BYTEADDRESSREGISTERNAMEDESCRIPTION
0x41000000PLLPIDPLLcontrollerperipheralidentificationregister
0x41000100PLLCSRPLLcontrol/statusregister
0x41000110PLLMPLLmultipliercontrolregister
0x41000114PLLDIV0PLLcontrollerdividerregister0
0x41000118PLLDIV1PLLcontrollerdividerregister1
0x4100011CPLLDIV2PLLcontrollerdividerregister2
0x41000120PLLDIV3PLLcontrollerdividerregister3
0x41000138PLLCMDPLLcontrollercommandregister
0x4100013CPLLSTATPLLcontrollerstatusregister
0x41000140ALNCTLPLLcontrollerclockaligncontrolregister
0x41000148CKENClockenablecontrolregister
0x4100014CCKSTATClockstatusregister
0x41000150SYSTATSYSCLKstatusregister
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