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4.10ExternalInterrupts
TMS320C6727,TMS320C6726,TMS320C6722
Floating-PointDigitalSignalProcessors
SPRS268E–MAY2005–REVISEDJANUARY2007
TheC672xDSPhasnodedicatedgeneral-purposeinterruptpins,butthedMAXcanbeusedin
combinationwithaMcASPAMUTEINsignaltoprovideexternalinterruptcapability.Thereisamultiplexer
foreachMcASP,controlledbytheCFGMCASP0/1/2registers,whichallowstheAMUTEINinputforthat
McASPtobesourcedfromoneofsevenI/OpinsontheDSP.OnceapinisconfiguredasanAMUTEIN
source,averyshortpulse(twoSYSCLK2cyclesormore)onthatpinwillgenerateaneventtothedMAX.
ThiseventcantriggerthedMAXtogenerateaCPUinterruptbyprogrammingtheassoicatedEventEntry.
ThereareafewadditionalpointstoconsiderwhenusingtheAMUTEINsignaltoenableexternalinterrupts
asdescribedabove.TheI/OpinselectedbytheCFGMCASP0/1/2registersmustbeconfiguredasa
general-purposeinputpinwithintheassociatedperipheral.Also,theAMUTEINsignalshouldbedisabled
withinthecorrespondingMcASPsothatAMUTEisnotdrivenwhenAMUTEINisactive.Thiscanbedone
byclearingtheINENbitoftheAMUTEregisterinsidetheMcASP.Finally,AMUTEINeventsarelogically
ORedwiththeMcASPtransmitandreceiveerroreventswithinthedMAX;therefore,theISRthat
processesthedMAXinterruptgeneratedbytheseeventsmustdiscernthesourceoftheevent.
TheEMIFEM_WAITpinhastheabilitytogenerateanNMI(INT1)baseduponarisingedgeonthe
EM_WAITpin.NotethatwhilethisinterruptisconnectedtotheCPUNMI(non-maskableinterrupt),itis
actuallymaskablethroughtheEMIFcontrolregisters.Infact,thedefaultstateforthisinterruptisdisabled.
Also,interruptgenerationalwaysoccursonarisingedgeofEM_WAIT;thepolarityselectionforwaitstate
generationhasnoeffectontheinterruptpolarity.TheEM_WAITpinshouldremainassertedforatleast
twoSYSCLK3cyclestoensurethattheedgeisdetected.
PeripheralandElectricalSpecifications 44SubmitDocumentationFeedback