Filter
Top Products
5B-7
November 1998
Part No. 001-7600-001
UHF (7640) CIRCUIT DESCRIPTION
SECTION 5B UHF (7640) CIRCUIT DESCRIPTION
NOTE: The UHF transceiver block diagram is located
on page 8-6.
5.5 UHF RECEIVER CIRCUIT
5.5.1 ANTENNA SWITCHING CIRCUIT
The antenna switching circuit functions as a low-
pass filter while receiving and a resonator circuit
while transmitting. This prevents the transmit signal
from entering the receiver in the transmit mode.
Received signals enter the antenna connector and
pass through a low-pass filter consisting of L1-L3, C1,
C2, and C9-C12. The filtered signal is then fed
through a quarter-wave type antenna switching circuit
formed by D4, D5, and L15 and applied to the
receiver RF circuit.
5.5.2 RF CIRCUIT
The RF circuit amplifies the frequencies that are
within the receive band range and attenuates out-of-
band signals.
The signal from the antenna switching circuit
passes through attenuator D4/D5. The attenuator cir-
cuit functions only when the attenuator function is
assigned to a programmable key. It is enabled to mini-
mize RF amplifier distortion caused by excessively
strong receive signals.
When the attenuator function is turned on, CPU
IC1, pin 32 switches the voltage level of the “RF
ATT” line from high to low and then controls the
attenuator switch Q1. The D4/D5 current then
increases and D4/D5 act as an attenuator.
This signal is then applied to a two-stage tunable
bandpass filter controlled by D7 and D8. The filtered
signals are amplified by RF amplifier Q2 and applied
to another two-stage bandpass filter controlled by D9
and D10. These filters attenuate unwanted signals.
The filtered signal is then applied to the first mixer
Q3.
The tunable bandpass filters controlled by D7-
D10 employ varactor diodes to tune them to the center
frequency of the RF passband. This gives a wide
bandwidth receiver good image response rejection.
The diodes are controlled by the CPU IC1 via level
controller IC12.
5.5.3 FIRST MIXER AND FIRST IF CIRCUITS
The first mixer circuit converts the received sig-
nal to a fixed frequency first IF signal of 46.350 MHz.
The RF signal from the bandpass filter is applied to
the first mixer Q3. This signal is mixed with the first
LO signal from VCO Q23 and buffers Q28 and Q30 to
produce the IF signal.
The 46.350 MHz first IF signal then passes
through a pair of crystal filters (FI1A/B) which sup-
press out-of-band signals. The filtered signal is then
amplified by first IF amplifier Q4 and applied to
second IF system IC1.
5.5.4 SECOND IF AND DEMODULATOR
CIRCUITS
The second mixer circuit converts the 46.350
MHz first IF signal to a 450 kHz second IF signal. A
double-conversion superheterodyne receiver like this
improves the image rejection ratio and provides a
stable receiver gain.
FM IF system IC1 contains second mixer, limiter
amplifier, quadrature detector, active filter and noise
amplifier circuits (see Figure 5-4). The first IF signal
from IF amplifier Q4 is applied to IC1, pin 16 which
is the input to the second mixer section. The 46.350
MHz first IF signal is mixed with the 45.900 MHz
second LO signal to produce the 450 kHz second IF
signal. The PLL reference frequency of 15.300 MHz
is tripled to produce the 45.900 MHz second LO
signal.
The second IF signal is fed out of IC1 on pin 3
and applied to ceramic filters FI2 and FI3 with narrow
band operation or only FI2 with wideband operation
(bypassing FI3). It is then fed back into IC1 on pin 5