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2.3CPUInterruptAssignments
TMS320C6727,TMS320C6726,TMS320C6722
Floating-PointDigitalSignalProcessors
SPRS268E–MAY2005–REVISEDJANUARY2007
Table2-2.NewFloating-PointInstructionsforC67x+CPU
FLOATING-POINT
INSTRUCTIONIMPROVES
OPERATION
(1)
MPYSPDPSPxDP→DPFasterthanMPYDP.
ImproveshighQbiquads(bassmanagement)andFFT.
MPYSP2DPSPxSP→DPFasterthanMPYDP.
ImprovesLongFIRs(EQ).
ADDSP(newtoCPU“S”Unit)SP+SP→SP
ADDDP(newtoCPU“S”Unit)DP+DP→DP
Nowuptofourfloating-pointaddandsubtractoperationsinparallel.
ImprovesFFTperformanceandsymmetricFIR.
SUBSP(newtoCPU“S”Unit)SP–SP→SP
SUBDP(newtoCPU“S”Unit)DP–DP→DP
(1)SPmeansIEEESingle-Precision(32-bit)operationsandDPmeansIEEEDouble-Precision(64-bit)operations.
Finally,twonewregisters,whicharededicatedtocommunicationwiththedMAXunit,havebeenaddedto
theC67x+CPU.TheseregistersarethedMAXEventTriggerRegister(DETR)andthedMAXEvent
StatusRegister(DESR).TheyallowtheCPUanddMAXtocommunicatewithoutrequiringanyaccesses
tothememorysystem.
Table2-3liststheinterruptchannelassignmentsontheC672xdevice.Ifmorethanonesourceislisted,
theinterruptchannelissharedandaninterruptonthischannelcouldhavecomefromanyoftheenabled
peripheralsonthatchannel.
ThedMAXperipheralhastwoCPUinterruptsdedicatedtoreportingFIFOstatus(INT7)andtransfer
completion(INT8).Inaddition,thedMAXcangenerateinterruptstotheCPUonlinesINT9–13andINT15
inresponsetoperipheralevents.Toenablethisfunctionality,theassociatedEventEntrywithinthedMAX
canbeprogrammedsothataCPUinterruptisgeneratedwhentheperipheraleventisreceived.
Table2-3.CPUInterruptAssignments
CPUINTERRUPTINTERRUPTSOURCE
INT0RESET
INT1NMI(FromdMAXorEMIFInterrupt)
INT2Reserved
INT3Reserved
INT4RTIInterrupt0
INT5RTIInterrupts1,2,3,andRTIOverflowInterrupts0and1.
INT6UHPICPUInterrupt(fromExternalHostMCU)
INT7FIFOstatusnotificationfromdMAX
INT8TransfercompletionnotificationfromdMAX
INT9dMAXevent(0x2specifiedinthedMAXinterruptevententry)
INT10dMAXevent(0x3specifiedinthedMAXinterruptevententry)
INT11dMAXevent(0x4specifiedinthedMAXinterruptevententry)
INT12dMAXevent(0x5specifiedinthedMAXinterruptevententry)
INT13dMAXevent(0x6specifiedinthedMAXinterruptevententry)
INT14I2C0,I2C1,SPI0,SPI1Interrupts
INT15dMAXevent(0x7specifiedinthedMAXinterruptevententry)
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