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2.8BootModes
TMS320C6727,TMS320C6726,TMS320C6722
Floating-PointDigitalSignalProcessors
SPRS268E–MAY2005–REVISEDJANUARY2007
TheC672xDSPsupportsonlyonehardwarebootmodeoption,thisistobootfromtheinternalROM
startingataddress0x00000000.Otherbootmodeoptionsareimplementedbyasoftwarebootloader
storedinROM.ThesoftwarebootloaderusestheCFGPIN0andCFGPIN1registers,whichcapturethe
stateofvariousdevicepinsatreset,todeterminewhichmodetoenter.Notethatinpractice,onlyafew
pinsareusedbythesoftware.
CAUTION
OnlyanexternallyappliedRESETcausestheCFGPIN0andCFGPIN1registersto
recapturetheirassociatedpinvalues.NeitheranemulatorresetnoraRTIreset
causestheseregisterstoupdate.
TheROMbootmodesinclude:
•ParallelFlashonEM_CS[2]
•SPI0orI2C1mastermodefromserialEEPROM
•SPI0orI2C1slavemodefromexternalMCU
•UHPIfromanexternalMCU
Table2-9describestherequiredbootpinsettingsatdeviceresetforeachbootmode.
Table2-9.RequiredBootPinSettingsatDeviceReset
BOOTMODEUHPI_HCSSPI0_SOMISPI0_SIMOSPI0_CLK
UHPI0BYTEAD
(1)
FULL
(1)
NMUX
(1)
ParallelFlash1010
SPI0Master1001
SPI0Slave1011
I2C1Master1101
I2C1Slave1111
(1)WhenUHPI_HCSis0,thestateoftheSPI0_SOMI,SPI0_SIMO,andSPI0_CLKpinsiscopiedintothespecifiedbitsintheCFGHPI
registerdescribedinTable4-12.
RefertotheC9230C100TMS320C672xFloating-PointDigitalSignalProcessorROMDataManual
(literaturenumberSPRS277)fordetailsonsupportedbootmodesandtheirimplementation.
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