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TMS320C6727,TMS320C6726,TMS320C6722
Floating-PointDigitalSignalProcessors
SPRS268E–MAY2005–REVISEDJANUARY2007
ThedMAXcontrollercomprises:
•Eventandinterruptprocessingregisters
•Eventencoder
•High-priorityeventParameterRAM(PaRAM)
•Low-priorityeventParameterRAM(PaRAM)
•Address-generationhardwareforHigh-PriorityEvents–MAX0(HiMAX)
•Address-generationhardwareforLow-PriorityEvents–MAX1(LoMAX)
TheTMS320C672xPeripheralBusStructurecanbedescribedlogicallyasaCrossbarSwitchwithfive
masterportsandfiveslaveports.Whenaccessingtheslaveports,theMAX0(HiMAX)moduleisalways
giventhehighestpriorityfollowedbytheMAX1(LoMAX)module.Inotherwords,incaseseveralmasters
(includingMAX0andMAX1)attempttoaccesssameslaveportconcurrently,theMAX0willbegiventhe
highestpriorityfollowedbyMAX1.
EventsignalsareconnectedtobitsofthedMAXEventRegister(DER),andthebitsintheDERreflectthe
currentstateoftheeventsignals.Aneventisdefinedasatransitionoftheeventsignal.ThedMAXEvent
FlagRegister(DEFR)canbeprogrammed,individuallyforeacheventsignal,tocaptureeitherlow-to-high
orhigh-to-lowtransitionsofthebitsintheDER(eventpolarityisindividuallyprogrammable).
Aneventisasynchronizationsignalthatcanbeused:1)toeithertriggerdMAXtostartatransfer,or2)to
generateaninterrupttotheCPU.Alltheeventsaresortedintotwogroups:low-priorityeventgroupand
high-priorityeventgroup.
TheHigh-PriorityDataMovementAcceleratorMAX0(HiMAX)moduleisdedicatedtoservingrequests
comingfromthehigh-priorityeventgroup.TheLow-PriorityDataMovementAcceleratorMAX1(LoMAX)
moduleisdedicatedtoservingrequestscomingfromthelow-priorityeventgroup.
EachPaRAMcontainstwosections:theevententrytablesectionandthetransferentrytablesection.An
evententrydescribesaneventtypeandassociatestheeventtoeitheroneoftransfertypesortoan
interrupt.Incaseanevententryassociatestheeventtooneofthetransfertypes,theevententrywill
containapointertothespecifictransferentryinthetransferentrytable.Thetransfertablemaycontainup
toeighttransferentries.AtransferentryspecifiesdetailsrequiredbythedMAXcontrollertoperformthe
transfer.Incaseanevententryassociatestheeventtoaninterrupt,theevententryspecifieswhich
interruptshouldbegeneratedtotheCPUincasetheeventarrives.
Priortoenablingeventsandtriggeringatransfer,theevententryandtransferentrymustbeconfigured.
Theevententrymustspecify:typeoftransfer,transferdetails(typeofsynchronization,reload,element
size,etc.),andshouldincludeapointertothetransferentry.Thetransferentrymustspecify:source,
destination,counts,andindexes.Ifaneventissortedinthehigh-priorityeventgroup,theevententryand
transferentrymustbespecifiedinthehigh-priorityParameterRAM.Ifaneventissortedinthelow-priority
eventgroup,theevententryandtransferentrymustbespecifiedinthelow-priorityparameterRAM.
ThedMAXEventFlagRegister(DEFR)capturesupto31separateevents;therefore,itispossiblefor
eventstooccursimultaneouslyonthedMAXeventinputs.Insuchcases,theeventencoderresolvesthe
orderofprocessing.Thismechanismsortssimultaneouseventsandsetsthepriorityoftheevents.The
dMAXcontrollercansimultaneouslyprocessoneeventfromeachprioritygroup.Therefore,thetwo
highest-priorityevents(onefromeachgroup)canbeprocessedatthesametime.
Anevent-triggereddMAXtransferallowsthesubmissionoftransferrequeststooccurautomaticallybased
onsystemevents,withoutanyinterventionbytheCPU.ThedMAXalsoincludessupportforCPU-initiated
transfersforaddedcontrolandrobustness,andtheycanbeusedtostartmemory-to-memorytransfers.
TogenerateaneventtothedMAXcontrollertheCPUmustcreateatransitionononeofthebitsfromthe
dMAXEventTrigger(DETR)Register,whicharemappedtotheDERregister.
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