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INDEX
INDEX-3 M32R-FPU Software Manual (Rev.1.01)
L
Load/store instructions 2-2
LD 3-61
LDB 3-63
LDH 3-64
LDUB 3-66
LDUH 3-67
LOCK 3-68
ST 3-109
STB 3-111
STH 3-112
UNLOCK 3-117
Logic operation instructions 2-5
AND 3-12
AND3 3-13
NOT 3-88
OR 3-89
OR3 3-90
XOR 3-119
XOR3 3-120
M
Multiply/divide instructions 2-5
DIV 3-34
DIVU 3-35
MUL 3-73
REM 3-95
REMU 3-96
O
Operation expression 3-2, 3-3
Operation instructions 2-4
Operand List 3-2
P
PC relative(pcdisp) 1-14, 3-2
Processor Status Register(PSW) 1-3, 1-4
Program Counter(PC) 1-11
E
EIT-related instructions 2-8
RTE 3-97
TRAP 3-116
F
Floating-point instruction 2-11
FADD 3-36
FCMP 3-38
FCMPE 3-40
FDIV 3-42
FMADD 3-44
FMSUB 3-47
FMUL 3-50
FSUB 3-52
FTOI 3-54
FTOI 3-54
ITOF 3-58
UTOF 3-118
Floating-point Status Register 1-6
G
General-purpose Registers 1-2
H
Hexadecimal Instruction Code APPENDICES-2
I
immediate 1-15, 3-2
Instruction Execution Time APPENDICES-17
Instruction format 2-12
Instruction List APPENDICES-4
Instruction set overview 2-2
Interrupt Stack Pointer(SPI) 1-2, 1-3, 1-5