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APPENDICES
APPENDICES-16
M32R-FPU Software Manual (Rev.1.01)
Appendix Figure 3.2.7 Pipeline Flow with Stalls (5)
<Case 12> The FPU and FMADD/FMSUB instructions run consecutively (with no register dependency)
IF D E1 E2 WB
IF D WBE2
DWBE2E1stall
IF D E2 WBEAEM
EAEM
stall
IF
<Case 13> The FPU and FMADD/FMSUB instructions run consecutively (with register dependency)
FADD R0,R1,R10
FADD R5,R6,R11
FMADD R2,R3,R4
FMADD R7,R8,R9
IF D E1 E2 WB
IF D WBE2
DWBE2E1stall
D stall
stall stall
stall stall stall stall
EAEM
stallstall
IF
FADD
R0
,R1,R10
FADD
R0
,
R0
,R11
FMADD
R0
,
R0
,R4
FMADD
R0
,R8,R9
IF WBE2EAEMstall
stall stall
APPENDIX 3
Appendix 3 Pipeline Processing